Optimization Of Memory Usage in High-Speed Cameras Using FPGA

Optimization Of Memory Usage in High-Speed Cameras Using FPGA.

Amirthavarshini  S A

Department of Electronics and Communication Engineering
Kongu Engineering College (Autonomous)
Erode, India.

amirthavarshinisa.21ece@kongu.edu

Dhivya Dharshini T

Department of Electronics and Communication Engineering
Kongu Engineering College (Autonomous)
Erode, India.
dhivyadharshinit.21ece@kongu.edu

Abstract—High-speed cameras generate large amounts of data, making memory optimization difficult for real-time processing. This project minimizes data size by converting RGBA (Red, Green, Blue, Alpha) images to RGB, eliminating the Alpha channel to reduce memory usage. The captured images are provided as input to Verilog code in hexadecimal format, with the conversion done by MATLAB. Bilinear Interpolation is applied to reduce the potential quantization errors during the conversion, using the values of four surrounding pixels to smooth the image and maintain quality. After processing, the image is reconstructed using MATLAB, ensuring the integrity of the output. By utilizing the parallel processing capabilities of FPGAs, this method ensures real-time performance while optimizing memory usage. It is ideal for high-speed imaging applications where both efficiency and image quality are crucial.

Keywords— Bilinear interpolation, RGBA, High-Speed Cameras, RGB, FPGA.