A NOVEL LOW POWER ALU DESIGNED BY USING HYBRID STT-MTJ/CMOS CIRCUIT

A NOVEL   LOW POWER ALU DESIGNED BY USING HYBRID STT-MTJ/CMOS CIRCUIT

Dr. G.Anantha Rao, Assistant professor

Electronics and communication Engineering department

GMR Institute of  Technology,, Rajam

Andhra Pradesh, India, Anantharao.g@gmail.com

Gopi Kommuju, student

Electronics and communication Engineering department

GMR institute of Technology, Rajam

Andhra Pradesh, India gopikommuju1@gmail.com

Abstract — The rise in power dissipation when the technology descends into the deep submicron zone is one of the main issues for CMOS technology due to its non-volatility, high speed, high endurance, CMOS compatibility, and primarily the low power dissipation. magnetic tunnel junction (MTJ) working on Spin transfer torque (STT). Switching mechanism is recognized as one of the most promising spintronic devices for post-CMOS era. This device can provide solutions for the issues posed by existing CMOS technology. We have put out a brand-new hybrid STT-MTJ/CMOS circuit-based logic-in-memory (LIM) P-magnetic arithmetic logic unit (P-MALU) design.. The behavior of  P-MALU designs in terms of power dissipation is then studied using Monte-Carlo(MC) simulation, which incorporates process and mismatch variations for CMOS and extracted parameters of MTJ . The P-MALU circuit has also been expanded to provide 4-bit arithmetic operations. Electrical simulations are run to ensure the design's operation.

Keywords—

MTJ , Spintronics , non-volatility, Switching mechanism ,STT-MTJ, logic in memory, p-magnetic arithematic  unit, monte- carlo simulation