A Review on FPGA-based Architectures for Noise Removal of Digital Images using High-Level Design

A Review on FPGA-based Architectures for Noise Removal of Digital Images using High-Level Design

1Jiya Kumari ,  2 Prof. Sandip Nemade , 3Dr. Divya Jain

1,2.3.4Technocrats Institute of Technology,  Bhopal

1Gmail id  - jiyabetchec@gmail.com

2Gmail id  - nemadesandiptit@gmail.com

3Gmail id  - divianu02@gmail.com

Abstract— Image corruption during the acquisition and transmission operations may be caused by a variety of disturbances. Scientists are still having trouble getting rid of the noise in the original picture. picture denoising is a technique used to improve a picture's visual quality and extract small details from a damaged image. Improving an image to make it crisper than it was originally is the aim of image restoration. The field of image processing is vast. This paper presents the results of some significant work in the subject of image denoising. It looks into image denoising using some of the most recent methods, such as SEPD (Simple Edge Preserved De-noising) and RSEPD (Reduced Simple Edge Preserved De-noising). Image corruption during the acquisition and transmission operations may be caused by a variety of disturbances. Scientists are still having trouble getting rid of the noise in the original picture. picture denoising is a technique used to improve a picture's visual quality and extract small details from a damaged image. Improving an image to make it crisper than it was originally is the aim of image restoration. The field of image processing is vast. This paper presents the results of some significant work in the subject of image denoising. It looks into image denoising using some of the most recent methods, such as SEPD (Simple Edge Preserved De-noising) and RSEPD (Reduced Simple Edge Preserved De-noising).

Keywords— Power consumption analysis, Digital logic circuits, Ultra-low power, Subthreshold operation, Static CMOS gates