ADVANCED RECONFIGURABLE FPGA ARCHITECTURE: MAXIMIZING DENSITY WITH OVERLAY VIA-SWITCH CROSSBARS

ADVANCED RECONFIGURABLE FPGA ARCHITECTURE: MAXIMIZING DENSITY WITH OVERLAY VIA-SWITCH CROSSBARS

Sai Jaswanth, Dr.G. Anantha rao

Electronics and communication Engineering department

GMR Institute of  Technology,

Rajam

Andhra Pradesh, India

Abstract

This paper proposes a highly dense reconfigurable architecture that introduces via-switch device, which is a nonvolatile resistive-change switch and is used in crossbar switches.

Via-switch is implemented in back-end-of-line layers only, and hence the front-end-of-line (FEOL) layers under the crossbar can be fully exploited for highly dense logic blocks. The proposed architecture uses the FEOL layers for fine-grained lookup tables and coarse-grained arithmetic/memory units for improving performance and compatibility with various applications.

A case study of application mapping shows the proposed architecture can reduce the array area by 21.7%, thanks to the bidirectional interconnection. Thanks to 18F2 footprint and one order of magnitude lower resistivity of via-switch compared to MOS switch, the crossbar density is improved by up to 26× and the delay and energy in the interconnection are reduced by 90% and 94% at 0.5-V operation.

Key points:1)Via switch device.

2)FEOL

3)BEOL