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ArticlePeer ReviewedOpen AccessPlagiarism Passed
Paper ID:IJSREM27815

ADVANCED RECONFIGURABLE FPGA ARCHITECTURE: MAXIMIZING DENSITY WITH OVERLAY VIA-SWITCH CROSSBARS

Stream/Area:

-

Subject:

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Paper ID:

IJSREM27815

Volume:

7 |

12 |

Dec 2023

Pages:

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Monthly (12 issues per year)

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License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.

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Authors

SJ

Sai Jaswanth

DAr

Dr.G. Anantha rao

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Abstract

This paper proposes a highly dense reconfigurable architecture that introduces via-switch device, which is a nonvolatile resistive-change switch and is used in crossbar switches. Via-switch is implemented in back-end-of-line layers only, and hence the front-end-of-line (FEOL) layers under the crossbar can be fully exploited for highly dense logic blocks. The proposed architecture uses the FEOL layers for fine-grained lookup tables and coarse-grained arithmetic/memory units for improving performance and compatibility with various applications. A case study of application mapping shows the proposed architecture can reduce the array area by 21.7%, thanks to the bidirectional interconnection. Thanks to 18F2 footprint and one order of magnitude lower resistivity of via-switch compared to MOS switch, the crossbar density is improved by up to 26× and the delay and energy in the interconnection are reduced by 90% and 94% at 0.5-V operation. Key points:1)Via switch device. 2)FEOL 3)BEOL

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Cite This Article

Sai Jaswanth, Dr.G. Anantha rao, "ADVANCED RECONFIGURABLE FPGA ARCHITECTURE: MAXIMIZING DENSITY WITH OVERLAY VIA-SWITCH CROSSBARS," International Journal of Scientific Research in Engineering and Management, vol. 7, no. 12, Dec 2023.

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Publication Date

12/29/2023

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