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Stream/Area:
-
Subject:
-
Paper ID:
IJSREM59399
Volume:
10 |
4 |
April 2026
Pages:
Publication Frequency:
Monthly (12 issues per year)
License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.
The rapid growth of data-intensive applications has created a strong need for high-speed and energy-efficient memory architectures, as conventional CMOS-based CAM and von Neumann systems face limitations such as high power consumption, poor scalability, and data transfer latency. To overcome these issues, this work proposes a reconfigurable framework that integrates Content Addressable Memory (CAM) and In-Memory Computing (IMC) using multistate Resistive Random Access Memory (RRAM). By utilizing the multi-level resistance states of RRAM, the proposed design enables both data storage and computation within the same memory array, supporting parallel search and processing operations. This reduces data movement, improves computational speed, lowers energy consumption, enhances storage density, and provides adaptable functionality for different computing tasks.
KEYWORDS
Publication Date
8/3/2026
Peer Review Type
Double-Blind Peer Review
Review Rounds: 2
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Conflict of Interest
The authors declare no conflict of interest related to this research work.
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