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ArticlePeer ReviewedOpen AccessPlagiarism Passed
Paper ID:10.55041/IJSREM29101

Basic Computer Architecture and Quantitative Techniques in Computer Design Instruction Pipeline ,Arithmetic Pipeline, Hazards ,Exception and Interrupts

Stream/Area:

-

Subject:

-

Paper ID:

10.55041/IJSREM29101

Volume:

8 |

3 |

Mar 2024

Pages:

Publication Frequency:

Monthly (12 issues per year)

DOI
Digital Object Identifier
10.55041/IJSREM29101

License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.

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RS

Rupam Sardar

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Abstract

We talk about the quantitative approach to computer architecture in this paper. We also go over Amdahl’s Law, scalability, parallelism, and the principle of locality in relation to quantitative measurement. We also demystify computer architecture by focusing on smart technical design and cost-performance-power trade-offs. In the context of computer architecture, we think the field has continued to develop and move toward the exacting quantitative foundation of venerable scientific and technical disciplines. The pipelining principles in processor design are the focus of this study.The fundamentals of the instruction pipeline are covered, and an example-based explanation of how to reduce a pipeline delay is provided.The primary goal is to comprehend how a processor’s pipeline functions.The different risks that lead to pipeline deterioration are described, along with ways to reduce them. Architecture-based development environments are emerging as a useful tool for building reliable distributed systems. By means of the abstract characterization of intricate software Software reuse and evolution are encouraged in terms of system topologies that involve the interface-level interaction of software parts. Furthermore, as evidenced by research findings in the field of software architecture, it becomes possible to offer formal annotations for the accurate characterization of configuration behavior together with related CASE tools for automated analysis. Nevertheless, while being essential to attaining software resilience, software fault tolerance—and specifically exception management in that context—has received little attention.

KEYWORDS

Instruction Pipeline Arithmetic Pipeline Hazards

Cite This Article

Rupam Sardar, "Basic Computer Architecture and Quantitative Techniques in Computer Design Instruction Pipeline ,Arithmetic Pipeline, Hazards ,Exception and Interrupts," International Journal of Scientific Research in Engineering and Management, vol. 8, no. 3, Mar 2024. https://doi.org/10.55041/IJSREM29101

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12/31/45357

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Double-Blind Peer Review

Review Rounds: 2

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