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Stream/Area:
-
Subject:
-
Paper ID:
10.55041/IJSREM29124
Volume:
8 |
3 |
Mar 2024
Pages:
Publication Frequency:
Monthly (12 issues per year)
License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.
Cache memory is mainly inculcated in systems to overcome the gap created in-between the main memory and CPUs due to their performance issues. Since, the speed of the processors is ever-increasing, so a need arises for a faster speed cache memory that can definitely assist in bridging the gap between the speed of processor and memory. Therefore, this paper proposes architecture circumscribed with three improvement techniques namely victim cache, sub-blocks, and memory bank. These three techniques will be implemented one after other to improve and make the speed and performance of cache comparative to main memory.
KEYWORDS
Publication Date
12/31/45357
Peer Review Type
Double-Blind Peer Review
Review Rounds: 2
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Conflict of Interest
The authors declare no conflict of interest related to this research work.
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