Loading article...
Loading article...
Stream/Area:
-
Subject:
-
Paper ID:
10.55041/IJSREM34869
Volume:
8 |
5 |
May 2024
Pages:
Publication Frequency:
Monthly (12 issues per year)
License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.
In order to guarantee their dependability, modern integrated circuits require efficient testing techniques. One of the greatest DFT methods [2] for logic design when an IC must be tested on a regular basis is LBIST. The DUT, a comparator, an analyzer, a test pattern generator, and memory for storing golden values are all part of the LBIST architecture. DUT affects the circuit’s power because it dwells with the test circuitry. The use of area- and power-efficient TPG can lower this overhead. The project’s primary goal is to put several TPGs that have been presented in a lifetime into practice and conduct a comparative analysis of them.
KEYWORDS
Publication Date
12/31/45439
Peer Review Type
Double-Blind Peer Review
Review Rounds: 2
Documents
Article Views
0
Total views since publication
PDF Downloads
1
Total downloads since publication
Geographic Reach
5
Digital Preservation: This article is permanently archived on Zenodo and complies with all data preservation standards across major indexing platforms.
Plagiarism Screening
This manuscript has been checked for plagiarism using TurnitinPlagiarismChecker software.
Conflict of Interest
The authors declare no conflict of interest related to this research work.
Funding Information
No funding information available for this research.
Related research in the same subject area
Loading similar articles...