DESIGN AND DEVELOPMENT OF DRIVER FOR AXI4 IN OPEN POWER ARCHITECTURE BASED INDIGENOUS SYSTEM ON CHIP- ANANTH

DESIGN AND DEVELOPMENT OF DRIVER FOR AXI4 IN OPEN POWER ARCHITECTURE BASED INDIGENOUS SYSTEM ON CHIP- ANANTH

G .Bhargav Reddy ¹,

M.Tech¹, CSE Dept¹, JNTUACEA¹, ANANTHAPURAMU¹ A.P¹, India¹

Abstract— AMBA AXI4 is the fourth generation of the AMBA interface specification from ARM. AXI is a Parallel high performance, synchronous, high frequency, multi-master multi-slave communication interface.  AXI is a burst-based protocol  that means there may be multiple data transfers (or beats) for a single request. It   supports for burst lengths up to 256 beats. AMBA AXI4 is the bus that performs best in terms of   Throughput   latency and utilization for single or multiple channels  AXI defines the protocol for the interface but not the interconnect. The  interconnect  does all kinds of protocol conversions and other features like bit mapping, width mapping and so forth. It is extendable for which open-ended to support future needs. Software connections between software programmes and hardware devices are known as device drivers. Device drivers are regarded exceedingly tough to build as part of a complicated operating system. They're often written in low-level programming languages like C. Device driver engineers must have a thorough grasp of the hardware and software platforms they are working with. C code will be translated to binary, which will be sent into the processor to conduct operations with the desired module. The goal of this project is to design and construct an AXI4 module driver that links all modules to an open power A2O core. The GCC compiler is necessary for driver design and development, and the C programming language will be used to construct drivers

Keywords- Advanced microcontroller bus architecture (AMBA) System-on-chip(SoC), Intellactual Property (IP), AMBA, AXI, VCS, Verilog