DESIGN AND IMPLEMENTATION OF A LOW POWER HIGH-SPEED DUAL-MODE SCHMITT TRIGGER WITH ADAPTIVE HYSTERESIS AND ENHANCED TRANSIENT ROBUSTNESS

This paper described the design and implementation of Adaptive Hysteresis Dual-Mode Schmitt Trigger using 90 nm CMOS technology. The proposed circuit improves on the conventional Dual-Mode Schmitt Trigger circuit by introducing a power-gating transistor, an adaptive feedback transistor, and an improved output stage. These modifications in the architecture have significantly improved the regenerative switching mechanism, leading to an increase in hysteresis width, stability, and transient robustness of the circuit. The circuit has been designed and simulated using the Cadence Virtuoso Analog Design Environment (ADE). Its performance was then verified through functional verification, DC Sweep Analysis, Transient analysis, and Single Event Transient (SET) analysis.   The results of the simulation show that the circuit has a hysteresis width of 317.76mV compared to 194.63mV of the conventional circuit, which amounts to an improvement of about 63.3%. Moreover, the proposed circuit has a reduced propagation delay of 112.04ps. Even though the proposed architecture consumes more power and requires additional silicon area, these drawbacks are compensated for by the substantial improvements in stability and robustness to transient and noise. Hence, the proposed Adaptive Hysteresis Dual-Mode Schmitt Trigger can be implemented successfully in applications where reliable and robust CMOS Switching Circuits are required.

1)       “Radiation Hardened Domino Logic-based Schmitt Trigger Circuit With Improved Noise immunity,” IEEE Trans. Device Mater Rel..VOL. 24, NO. 4, Dec. 2024. 2)      A.P.Shah, N.Yadav,A.Beohar,and S.K.Vishvakarma, “Process variation and NBTI resilient Schmitt trigger for stsble and reliable circuits,”IEEE Trans. Device Mater.rel., vol.18,no.4,pp.546-556,Dec.2018. 3)      N.Singh, S.Shekhar and A.Angeline, “Schmitt trigger designs using domino logic style,” ECS Trans.,vol.107,no. 1,p.8885,2022. 4)      S. B. Ramakrishna, S. Madhusudhan, B. Nikshep, B. Naveen, and H. D. Teertha prasad, “Power and delay optimization of domino Schmitt trigger configurations with enhanced hysteresis voltage,” Analog Integer. Circuits Signal Process.. vol.102,no.1,pp.53-61,2020. 5)      M. J. Gadlage, J. R. Ahlbin, P. gadfort, A. H. Roach, and S. Stansberry, “Characterization of single-event transients in Schmitt trigger inverter chains operating at subthreshold voltages,” IEEE Trans.Nucl, Sci.,[6] vol.64, no. 1,pp. 637-642, Jan.2017. 6)      S. Al-Sarawi, “Low power Schmitt trigger circuit,” Electron. Lett., vol. 38, no. 18, p. 1, 2002. 7)      A. Panda,A. K. Singh, R. Tirupathi, and S. K. Kar, “A low-power tuable square-wave generator for instrumentation applications,” IEEE [8] Trans. Instrum. Meas., vol.69, no.7, pp. 5051-5057, Jul. 2020. 8)      T. D. Fernandes, C. Galup-Montoro, and M.C. Schneider, “Analysis and design of the three-invertet Schmitt trigger for supply voltages down to 50 mV,” IEEE Trans. Circuits Syst. II,Exp. Briefs, vol. 68, no. 7, pp. 2302-2306, Jul. 2021 9)       K. Kim and S. Kim, “Design of Schmitt trigger logic gates using DTMOS for enhanced electromagnetic immunity of subthreshold circuits,” IEEE Trans. Electromagn. Compat., vol. 57, no. 5, pp. 963–972, Oct. 2015. 10)    L. A. P. Melek, A. L. da Silva, M. C. Schneider, and C. Galup- Montoro, “Analysis and design of the classical CMOS Schmitt trigger in subthreshold operation,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 64, no. 4, pp. 869–878, Apr. 2017.