Design and Simulation of Power Efficient 32-bit Vedic Multiplier Using Brent-Kung Adder with Flip-Flop Based Clock Gating

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SJIF Impact Factor 8.659 | ISSN: 2582-3930

International Journal of Scientific Research in Engineering and Management

(Gateway to Global Scholars - An International, Scholarly, Multi-Disciplinary, Open Access Journal)

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Design and Simulation of Power Efficient 32-bit Vedic Multiplier Using Brent-Kung Adder with Flip-Flop Based Clock Gating | IJSREM