Design and VLSI implementation of Delta-Sigma ADC

In this work, a Delta-Sigma Analog to Digital Converter is designed using CMOS VLSI technology. The main aim of this design is to convert low-frequency analog signals into digital form with good accuracy and low power usage. Instead of using complex analog circuits, this converter uses oversampling and a feedback loop to improve resolution. The design mainly consists of an integrator, comparator, and a one-bit feedback circuit. Each block is designed and tested separately and then connected together to form the complete system. Simulation results show that the output bitstream correctly follows the input signal, which proves proper noise shaping and stable operation. Due to its simple structure and reliable performance, this design is suitable for low-power and low-frequency VLSI applications.