DESIGN OF A POWER-EFFICIENT CARRY SELECT ADDER USING REVERSIBLE LOGIC AND ONLINE TESTING

This paper has summarized a power-efficient Carry Select Adder project that combines a hybrid CLA/Kogge–Stone architecture with reversible logic and parity-based online checking. The approach addresses the delay and resource-use limitations of conventional CSLA designs while adding a mechanism intended to identify output inconsistencies. The source project describes successful functional simulation and qualitative benefits in propagation delay and power, alongside a potential area overhead from parallel blocks and checking logic. Future work can provide a more complete quantitative comparison across baseline architectures, optimize reversible gate count and block partitioning, extend testing to larger bit widths, and evaluate the parity mechanism against defined single- and multiple-fault models. Hardware validation and implementation on newer platforms could further clarify practical performance and scalability.

[1]   R. Landauer, “Irreversibility and Heat Generation in the Computing Process,” IBM Journal of Research and Development, vol. 5, no. 3, pp. 183–191, 1961. [2]  C. H. Bennett, “Logical Reversibility of Computation,” IBM Journal of Research and Development, vol. 17, no. 6, pp. 525–532, 1973. [3]   M. Morris Mano and M. D. Ciletti, Digital Design, 5th ed. Pearson Education, 2013. [4]   J. M. Rabaey, A. Chandrakasan, and B. Nikolić, Digital Integrated Circuits: A Design Perspective, 2nd ed. Pearson, 2003. [5]  B. Parhami, Computer Arithmetic: Algorithms and Hardware Designs. Oxford University Press, 2000. [6]  H. Thapliyal and M. B. Srinivas, “Novel Reversible Logic Gate and Its Application,” Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2005. [7]  E. Fredkin and T. Toffoli, “Conservative Logic,” International Journal of Theoretical Physics, vol. 21, pp. 219–253, 1982. [8]  M. Nielsen and I. Chuang, Quantum Computation and Quantum Information. Cambridge University Press, 2000. [9]  Xilinx Inc., Xilinx ISE Design Suite 14.7 User Guide, 2013.