Design of Energy-Efficient Barrel Shifter and Vedic Multiplier Using Kogge-Stone Adder

This paper presents a detailed design of an energy-efficient barrel shifter and Vedic multiplier integrated with a Kogge-Stone Adder (KSA). The proposed system achieves high-speed computation using parallel prefix structures while reducing power consumption. The design is implemented using Verilog HDL and validated through simulation. The results demonstrate improved delay and efficiency compared to conventional architectures.