GPU-Based, LDPC Decoding for 5G and Beyond

The New 5G Radio (NR) includes low-density parity-checking (LDPC) codes as errors correction code (ECC) for the data channel. For LDPC codes for low performance, near Shannon power, bit error rate (BER), they are also mathematically complex in physical representation applications. Moreover,5G LDPC has additional challenges not found in previous LDPC implementations, such as Wi-Fi. LDPC and.The specification in 5G includes many new configurations to support different rates, block sizes and use cases.5G is also targeted to support increased usage and lower latency. For this new, more flexible versionStandard, traditional hardware-based solutions in FGPA and ASIC may struggle to support all issues with.It can be costly in scale. The software solution can seamlessly support all possible reconfigurations however.Struggles in the workplace. This case shows its high throughput and low latencyGraphics Processing Units (GPUs) for LDPC decoding as an alternative to FPGA and ASIC decoders, .To effectively deliver the high performance required while maintaining the advantages of the based software answer. In particular, we focus on how by changing the parallelization scheme for GPU kernel mappingto blocks, we can use more GPU cores to compute a codeword faster to aim for low-latency, or We can use core to work on multiple codewords at the same time to aim at high throughput applications.This flexibility is particularly useful for virtualized radio- access networks(vRAN), which are the next generationa technology that is expected to become more prominent in the coming years. Hardware on vRAN audit resources will be released from specific audit projects in the RAN With virtualization, it allows for load balancing and other benefits.