Hybrid Logic Circuit-based one-bit Full-Adder for  Energy-Efficient DSP Applications

Hybrid Logic Circuit-based one-bit Full-Adder for  Energy-Efficient DSP Applications

Veena Yadav S1, S. Hamsa2, M. C. Parameshwara2

1Research Scholar, Dept. of ECE, Jain University (Deemed to be University), E-mail: veena.yadav1@gmail.com,

2Assitant Professor, Dept. of ECE, Jain University (Deemed to be University), E-mail: s.hamsa@jainuniversity.ac.in,

3Associate Professor, Department of ECE, Vemana Institute of Technology, Bangalore. E-mail: pmcvit@gmail.com,

Abstract— This study offers revolutionary 24-transistors (24T), 1-bit 'full-adder' (FA) for energy-efficient DSP applications. A hybrid XNOR circuit is used to create the proposed 1-bit FA. The hybrid XNOR circuit is built utilising the GDI (gate-diffusion-input) technology, TG (transmission gate), and SCMOS (static CMOS) logic. To evaluate the proposed FA's performance, 'Design Metrics' (DMs) such as power, delay, 'power-delay-product' (PDP), and area are compared to state-of-the-art FAs. All of the FAs under examination were built and simulated under common 'process-voltage-temperature' (PVT) conditions for a fair comparison