IMPLEMENTATION OF DEVICE DRIVER FOR DDR3 IN OPEN POWER A20 PROCESSOR

Advanced microcontroller bus architecture (AMBA) protocol family provides metric-driven verification of protocol compliance, enabling comprehensive testing of interface intellectual property (IP) blocks and system-on-chip (SoC) designs. DDR3 SDRAM or double-data-rate three synchronous dynamic random access memories is a random access memory interface technology used for high bandwidth storage of the working data of a computer or other digital electronic devices. DDR# is a part of the SDRAM family of technologies and is one of the many DRAM(Dynamic Random Access Memory) implementations. DDr3 SDRAM is the 3rd generation of DDR memories, featuring higher performances and lower power consumption. Device drivers are software interfaces between software applications and hardware devices. As part of complex operating system, device, drivers are considered extremely difficult to develop. They are usually developed in low-level programming languages, such as C. The device driver developers must have an in-depth understanding of given hardware and software platforms. Code written in C language will be converted into binary which is fed into processor to perform operations with desired module. This project Proposes to design and develop driver for DDR3 which is connected to A2O core through AMBA AXI4 bus interface. Tools required for design and development of driver is GCC compiler and C language will be used to develop drivers.