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ArticlePeer ReviewedOpen AccessPlagiarism Passed
Paper ID:IJSREM16770

IMPLEMENTATION OF DRIVER FOR DMA IN OPEN POWER ARCHITECTURE A20 PROCESSOR

Stream/Area:

-

Subject:

-

Paper ID:

IJSREM16770

Volume:

6 |

11 |

Nov 2022

Pages:

Publication Frequency:

Monthly (12 issues per year)

DOI
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Not assigned

License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.

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RR

R.Jahnavi Ram

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Abstract

Direct memory access (DMA) is a hardware function within a computer system that is used to relieve the processor or coprocessor from the burden of copying large blocks of data. It allows hardware subsystems to access main system random-access memory independently of the central processing unit (CPU). DMA allows an input/output (I/O) device to send or receive data directly to or from the main memory. A device drivers provides a connection between interface to hardware devices. Device drivers are difficult to build as part of complicated operating system. They’re often written in C language because it is a low level programming language. Device drivers developers must have a thorough grasp of the hardware and software systems they are working with. C code will be translated to binary, which will be sent into the processor to conduct operations with the desired module. Tools required for design and development of driver is GCC compiler. Code written in C will be converted into binary which is fed into processor to perform operation with desired module.This project goal is to design and develop a driver for DMA which is connected to A2O core through the AMBA AXI4 bus interface. The GCC compiler will be used to generate the drivers. Drivers will be written in the C programming language

KEYWORDS

Advanced microcontroller bus architecture (AMBA) System-on-chip(SoC) Intellactual Property (IP) AMBA AXI VCS Verilog

Cite This Article

R.Jahnavi Ram, "IMPLEMENTATION OF DRIVER FOR DMA IN OPEN POWER ARCHITECTURE A20 PROCESSOR," International Journal of Scientific Research in Engineering and Management, vol. 6, no. 11, Nov 2022.

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9/10/2022

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Double-Blind Peer Review

Review Rounds: 2

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The authors declare no conflict of interest related to this research work.

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