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Stream/Area:
-
Subject:
-
Paper ID:
IJSREM16254
Volume:
6 |
9 |
Sep 2022
Pages:
Publication Frequency:
Monthly (12 issues per year)
License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.
The cascaded multilevel inverter (CMLI) has gained much attention in recent years due to its advantages in high voltage and high power with low harmonics applications. A standard cascaded multilevel inverter requires n DC sources for 2n+1 levels at the output, where n is the number of inverter stages. This paper presents a topology to control cascaded multilevel inverter that is implemented with multiple DC sources to get 2n+1 – 1 levels. With using Pulse Width Modulation (PWM) technique, the firing circuit can be implemented which greatly reduces the Total Harmonic Distortion (THD) and switching losses..
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Publication Date
3/8/2022
Peer Review Type
Double-Blind Peer Review
Review Rounds: 2
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Conflict of Interest
The authors declare no conflict of interest related to this research work.
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