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ArticlePeer ReviewedOpen AccessPlagiarism Passed
Paper ID:IJSREM40114

Machine Learning-Driven Paradigms in VLSI Design: Exploring the Synergy with Pruning for Optimal Circuit Efficiency

Stream/Area:

-

Subject:

-

Paper ID:

IJSREM40114

Volume:

8 |

12 |

Dec 2024

Pages:

Publication Frequency:

Monthly (12 issues per year)

DOI
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Not assigned

License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.

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Authors

VS

Vaishnavi Shinde

SS

Saurav Sahane

PK

Pranav Kedari

NS

Neha Singh

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Abstract

This paper investigates the incorporation of machine learning (ML) techniques in Very Large-Scale Integration (VLSI) design, concentrating on pruning methods to boost circuit efficiency. By utilizing ML algorithms for feature extraction, optimization, and decision-making while applying pruning methods to eliminate redundancy, our study introduces a unique strategy for achieving superior circuit performance. Key contributions include a thorough methodology that describes ML- based pruning in hardware design along with an assessment of its effects on design metrics like area, power, and speed. The findings indicate substantial advancements, implying that ML-based pruning could transform VLSI design processes.

KEYWORDS

Machine Learning (ML) Very Large- Scale Integration (VLSI) Pruning Techniques Circuit Efficiency ML-Driven Pruning

Cite This Article

Vaishnavi Shinde, Saurav Sahane, Pranav Kedari, Neha Singh, "Machine Learning-Driven Paradigms in VLSI Design: Exploring the Synergy with Pruning for Optimal Circuit Efficiency," International Journal of Scientific Research in Engineering and Management, vol. 8, no. 12, Dec 2024.

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Publication Date

12/30/2024

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Double-Blind Peer Review

Review Rounds: 2

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