Single Bit Alu Using Reversible Logic Gates

Single Bit Alu Using Reversible Logic Gates

Dasari Mahesh Kumar1, Anas Ali Shafe2, Mannala Divya3,Kandi Srivyshnavi4,Puli Sumanth5,Gulla Rajkumar6

1Electronics  &   communication, Jyothishmathi institute of technology and science

2Electronics  & communication, Jyothishmathi institute of technology and science

3Electronics & communication, Jyothishmathi institute of technology and science

4Electronics &  communication, Jyothishmathi institute of technology and science

5Electronics &  communication, Jyothishmathi institute of technology and science

6Electronics &  communication , Jyothishmathi institute of technology and science

Abstract— In this digital world, technology depends on the operations of A.L.U to decide the system performance. The need for an Arithmetic Logic Unit (ALU) is as important as the computer, simply because ALU forms the fundamental part of any Central Processing Unit (CPU). And so the encryption of an ALU is highly mandatory for the safety of the device as there are hardly any device without an ALU. This paper deals with the design of an single-bit ALU using a hardware description language, HDL that is structurally modelled. The results are verified and synthesized through Xilinx.

Keywords- ALU, FPGA SPARTAN6, REVERSIBLE LOGIC, QUANTUM COST, FEYNMAN GATE.