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ArticlePeer ReviewedOpen AccessPlagiarism Passed
Paper ID:IJSREM49514

Single Bit Alu Using Reversible Logic Gates

Stream/Area:

-

Subject:

-

Paper ID:

IJSREM49514

Volume:

9 |

6 |

Jun 2025

Pages:

Publication Frequency:

Monthly (12 issues per year)

DOI
Digital Object Identifier
10.55041/ijsrem49514

License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.

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Authors

DMK

Dasari Mahesh Kumar

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Abstract

In this digital world, technology depends on the operations of A.L.U to decide the system performance. The need for an Arithmetic Logic Unit (ALU) is as important as the computer, simply because ALU forms the fundamental part of any Central Processing Unit (CPU). And so the encryption of an ALU is highly mandatory for the safety of the device as there are hardly any device without an ALU. This paper deals with the design of an single-bit ALU using a hardware description language, HDL that is structurally modelled. The results are verified and synthesized through Xilinx.

KEYWORDS

ALU FPGA SPARTAN6 REVERSIBLE LOGIC QUANTUM COST FEYNMAN GATE

Cite This Article

Dasari Mahesh Kumar, "Single Bit Alu Using Reversible Logic Gates," International Journal of Scientific Research in Engineering and Management, vol. 9, no. 6, Jun 2025. https://doi.org/10.55041/ijsrem49514

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Publication Date

6/9/2025

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Double-Blind Peer Review

Review Rounds: 2

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The authors declare no conflict of interest related to this research work.

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