Technology-Calibrated Multi-Level Energy Modeling of Processing-in-Memory Architectures for CNN Inference in Resource-Constrained Systems

The increasing deployment of convolutional neural networks (CNN) in embedded and edge systems has significantly increased power consumption due to intensive computation and frequent memory accesses. Traditional von Neumann architectures suffer from high data movement overhead between the processor and the multi-level memory hierarchy, resulting in substantial energy inefficiency. This paper presents a realistic multi-level analytical power model for evaluating processing-in-memory (PIM) architectures applied to CNN inference. Unlike simplified single-level memory models, the proposed framework incorporates L1 cache, L2 cache, DRAM, and on-chip PIM memory power costs, enabling architecture-aware evaluation without hardware fabrication. Three real CNN models (LeNet, ResNet18 and MobileNet) are evaluated using Python-based simulation. The results show an energy improvement of up to 11.14% for LeNet, 10.19% for MobileNet, and 3.63% for ResNet18 under realistic memory hierarchies. The results demonstrate that PIM architectures are most effective for memory-bound CNN workloads deployed in resource-constrained environments, such as edge AI systems.