Wireless Communication Between Multi-FPGAs

Wireless Communication Between Multi-FPGAs

Suhas D B1, Sumanth Heblikar2, Savan S. Shivanagutti3, Pooja A P4, Vasundhara Patel5

1 Electronics and Communication & BMS College Of Engineering

2 Electronics and Communication & BMS College Of Engineering

3 Electronics and Communication & BMS College Of Engineering

4 Electronics and Communication & BMS College Of Engineering

5 Electronics and Communication & BMS College Of Engineering

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Abstract – PHY Layer implementation of the IEEE 802.11 a/g/n Wi-Fi standard using Software-Defined Radio (SDR) architecture. It addresses the challenge of implementing Wi-Fi on SDR platforms, which has been difficult due to the strict timing requirements of Wi-Fi protocols such as the Short Inter-Frame Space (SIFS) and the need for low-latency communication between the radio front-end and the processing unit. This architecture enables the implementation of the PHY (Physical layer) and low-level MAC (Media Access Control) functionalities in the FPGA, ensuring low latency and precise timing control.

Key Words:  PLCP, OFDM, SDR, BPSK, QPSK, QAM, PSDU, NCS