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Stream/Area:
-
Subject:
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Paper ID:
IJSREM66302
Volume:
10 |
7 |
Jul 2026
Pages:
1-22
Publication Frequency:
Monthly (12 issues per year)
License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.
Department of Civil Engineering
Electronics and Telecommunication Department, ALARD School of Interdisciplinary Research, ALARD University
HOD, Electronics and Telecommunication Department,
ALARD School of Interdisciplinary Research, ALARD University, Pune
This study presents a comprehensive systematic review of Hybrid Artificial Intelligence (AI) frameworks that integrate circuit-level optimization with machine learning (ML), reinforcement learning (RL), and evolutionary algorithms. By analyzing bibliometric data and technical literature from 2015–2025, the paper synthesizes how AI-driven approaches revolutionize Very Large-Scale Integration (VLSI) and hardware design automation. The review identifies key trends in AI-integrated Electronic Design Automation (EDA), emphasizing hybrid models that achieve superior trade-offs in power, performance, and area (PPA). Reinforcement learning and genetic algorithms enable global optimization, while deep learning methods enhance prediction accuracy and scalability. The findings demonstrate significant performance improvements reducing design time and computational cost—compared to traditional rule-based systems. However, challenges persist in interpretability, real-time adaptability, and integration overhead. The study provides a structured taxonomy of hybrid AI systems, evaluates their methodological strengths, and highlights research gaps in scalability and explainability. Overall, it contributes a unified perspective and roadmap for future intelligent hardware co-design.
KEYWORDS
This review focused on the integration of evolutionary, learning, and reinforcement techniques with circuit-level optimisation. The analysis indicated that hybrid AI excelled in adapting automation, fast convergence, and design flexibility beyond traditional heuristics and deterministic models. The bibliometrics showed a prominent and unrivalled rise in the design of intelligent hardware from 2015-2025 by Tsinghua University, the University of Chinese Academy of Sciences, and Harvard University, illustrating perceptible international cooperation in the field. The advancement of hybrid AI enabled self-predictive and adaptive learning electronic systems in FPGA optimisation, quantum circuit design, and neuromorphic architecture. With these hybrid systems, the models transition from a hardware design process of parameter tuning to one driven by data. The review provides significant contributions to the field by offering a hybrid AI systems taxonomy and synthesis while outlining the need for adaptively, real-time explainability, and lightweight models. Further work is also recommended for the development of AI-integrated EDA tools for automated circuit design. Overall, this study outlines the first comprehensive vision on hybrid AI–hardware co-design by marrying intelligent computation with engineering design for the development of smart, energy-efficient electronics.
1. Agnesina, A., et al. (2020). VLSI Placement Parameter Optimization using Deep Reinforcement Learning. ICCAD paper / technical report. Retrieved from https://www.gtcad.gatech.edu/www/papers/agnesina-iccad20.pdf. gtcad.gatech.edu 2. Attaoui, Y., Chentouf, M., & Ismaili, Z. E. A. (2024). Machine Learning in VLSI Design: A Comprehensive Review. Journal of Integrated Circuits and Systems. Retrieved from https://jics.org.br/ojs/index.php/JICS/article/download/826/500. jics.org.br+1 3. Fernando, P. R. (2019). Genetic Algorithm Based Design and Optimization of VLSI. University/Technical Report. Retrieved from https://digitalcommons.usf.edu/cgi/viewcontent.cgi?article=2962&context=etd. digitalcommons.usf.edu 4. Wang, Z. (2024). A Review on FPGA-Based Optimization and Applications of CNNs. CEUR Workshops. Retrieved from https://ceur-ws.org/Vol-3748/paper13.pdf. ceur-ws.org 5. Karuppasamy, K., Puram, V., Johnson, S., & Thomas, J. P. (2024). A Comprehensive Review of Quantum Circuit Optimization: Current Trends and Future Directions. arXiv. Retrieved from https://arxiv.org/pdf/2408.08941. arXiv 6. Paler, A. (2023). Machine Learning Optimization of Quantum Circuit Layouts. ACM Proceedings. Retrieved from https://dl.acm.org/doi/10.1145/3565271. dl.acm.org 7. Riu, J., et al. (2025). Reinforcement Learning Based Quantum Circuit Optimization (ZX-diagram RL + GNNs). Quantum Journal. Retrieved from https://quantum-journal.org/papers/q-2025-05-28-1758/. Quantum 8. “Machine Learning in VLSI layout design” (2024). Leveraging ML for enhanced automation in VLSI layout design. Journal/Report. Retrieved from https://urfjournals.org/open-access/leveraging-machine-learning-for-enhanced-automation-in-vlsi-layout-design-optimizing-performance-and-efficiency.pdf. urfjournals.org 9. Research on FPGA ML accelerators (survey) — Darvish Rouhani, et al. (2024). A survey on FPGA-based accelerators for ML models. arXiv. Retrieved from https://arxiv.org/html/2412.15666v1. arXiv 10. “Deep RL Global Router” — Enhanced DRL routing (2023). An Enhanced Deep Reinforcement Learning-Based Global Router for VLSI Design. Retrieved from https://www.researchgate.net/publication/370564725_An_Enhanced_Deep_Reinforcement_Learning-Based_Global_Router_for_VLSI_Design
Publication Date
7/25/2026
Peer Review Type
Double-Blind Peer Review
Review Rounds: 2
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