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Paper ID:IJSREM68472

Grid Power Reduced-Component Multilevel Inverter Modelling and Simulation Improvement of Quality

Stream/Area:

-

Subject:

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Paper ID:

IJSREM68472

Volume:

10 |

10 |

Oct 2026

Pages:

1-8

Publication Frequency:

Monthly (12 issues per year)

DOI
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Not assigned

License:International Journal of Scientific Research in Engineering and Management follows the Creative Commons Attribution 4.0 (CC BY 4.0) License, allowing free use and distribution with proper attribution.

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Authors

Bhukya. Chandrashekhar

Bhukya. Chandrashekhar

Elecrical and Electronics Engineering

KLR College Of Engineering and Technology

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M.K

Maisakshi .Pavan Kumar

Elecrical and Electronics Engineering

KLR College Of Engineering and Technology

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AK

Arpula. Krishnaiah

Elecrical and Electronics Engineering

KLR College Of Engineering and Technology

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Abstract

Compact, efficient, and high-performance power conversion systems that can produce high-quality output power with little harmonic distortion are in high demand due to the growing integration of renewable energy resources into current electrical networks. Although traditional MLI topologies can produce high-quality voltage waveforms, they are notoriously expensive, physically large, control-complicated, and lossy due to the abundance of passive components, isolated DC sources, and semiconductor switches needed. This study models and simulates a reduced-component switched-capacitor multilevel inverter for grid-connected solar applications in order to circumvent these restrictions. In order to synthesise numerous voltage levels with a single DC source and a switched-capacitor voltage boosting network, the suggested topology drastically reduces the number of components without compromising voltage gain or output performance. To simplify the control architecture, we produce the gating signals using a Level-Shifted Pulse Width Modulation (LS-PWM) technique, which allows for stable capacitor voltage balancing and smooth multilevel voltage generation. In addition, an algorithm called Incremental Conductance Maximum Power Point Tracking (IC-MPPT) is used to improve the total conversion efficiency by extracting the most energy possible from the solar source in different climatic conditions. To study the output voltage properties, quality of the current waveform, stability of the capacitor voltage, dynamic responsiveness, and harmonic performance, the whole system is modelled and tested in the MATLAB/Simulink environment under grid-connected working circumstances. Simulation results show that compared to traditional multilevel inverter structures, the suggested inverter uses fewer power electronic components, improves power quality, boosts voltage more effectively, reduces switching stress, and produces a high-resolution stepped output waveform with reduced Total Harmonic Distortion (THD). Photovoltaic energy conversion and future smart-grid power conditioning applications will benefit greatly from the suggested inverter's simpler control method, enhanced conversion performance, and decreased hardware demand.

KEYWORDS

Switched-capacitor low components inrush current limitation ripple reduction simple control.

Cite This Article

Bhukya. Chandrashekhar, Maisakshi .Pavan Kumar, Arpula. Krishnaiah, "Grid Power Reduced-Component Multilevel Inverter Modelling and Simulation Improvement of Quality," International Journal of Scientific Research in Engineering and Management, vol. 10, no. 10, pp. 1-8, Oct 2026.

Full Article/Conclusion

This study detailed the planning, modelling, and testing of a 17-level switched-capacitor multilevel inverter for use in PV energy conversion systems that are connected to the grid. The goal of developing this converter was to reduce the number of power electronic components needed for conventional multilevel inverter topologies while still generating a high-quality AC output. A single DC input source and an optimised switched-capacitor network allowed the converter to produce seventeen different voltage levels from a small circuit. Hardware implementation was simplified without sacrificing efficiency in voltage boosting due to the reduced number of semiconductor switches, capacitors, and gate-driving signals. In addition, the Level-Shifted Pulse Width Modulation (LS-PWM) technique was used to achieve accurate switching control and inherent capacitor voltage balancing without the need for extra balancing circuits. An inrush current limiting inductor was also included to reduce charging current to a minimum and improve the converter's overall reliability. The steady-state operational properties of the proposed converter were verified by analysis in the MATLAB/Simulink environment, which was used for effective implementation.  The simulation results showed that the system was stable, with an output voltage that followed a well-defined 17-level staircase and a waveform for the load current that was almost sinusoidal. With a straightforward circuit design, the converter increased the input voltage from 75 V to about 300 V, a voltage gain of four. A Total Harmonic Distortion (THD) of 2.81% was verified by the FFT analysis, which means that the output waveform is of outstanding quality and meets the power quality criteria of renewable energy applications. Furthermore, the converter demonstrated little power loss during switching, decreased voltage stress on semiconductor devices, and effective balancing of capacitor voltages during operation. Based on these findings, the suggested topology is an attractive option for small and inexpensive grid-connected photovoltaic power conversion systems since it strikes a good balance between high voltage gain, low harmonic distortion, reduced component count, and simplified control.

References

[1] K. K. Gupta, A. Ranjan, P. Bhatnagar, L. K. Sahu, and S. Jain, ‘‘Multilevel inverter topologies with reduced device count: A review,’’ IEEE Trans. Power Electron., vol. 31, no. 1, pp. 135–151, Jan. 2016. [2] A. K. Singh, R. K. Mandal, and R. Anand, ‘‘A novel 5L boosting inverter with reduced spike current,’’ IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 71, no. 10, pp. 4556–4560, Oct. 2024. [3] M. Chen and P. C. Loh, ‘‘A single-phase high voltage-gain differential Ysource inverter,’’ IEEE J. Emerg. Sel. Topics Power Electron., vol. 9, no. 2, pp. 2027 2037, Apr. 2021. [4] M. Chen, Y. Yang, P. C. Loh, and F. Blaabjerg, ‘‘A cascaded half bridge three-level inverter with an inductive DC-link for flexible voltage boosting,’’ IEEE Trans. Ind. Electron., vol. 69, no. 5, pp. 4901–4913, May 2022. [5] N. Sandeep and J. S. Ali, ‘‘An improved quadruple-boost switched capacitor- based nine-level inverter,’’ IEEE Trans. Power Electron., vol. 38, no. 8, pp. 9335–9339, Aug. 2023. [6] J. Zhao, Y. Chen, J. Zeng, and J. Liu, ‘‘A hybrid nine-level inverter with reduced components and simplified control,’’ IEEE J. Emerg. Sel. Topics Power Electron., vol. 10, no. 4, pp. 4498–4508, Aug. 2022. [7] F. Esmaeili, H. R. Koofigar, and H. Qasemi, ‘‘A novel singlephase multilevel high-gain inverter with low voltage stress,’’ IEEE J. Emerg. Sel. Topics Power Electron., vol. 10, no. 5, pp. 6084–6092, Oct. 2022. [8] M. S. B. Arif, U. Mustafa, S. B. M. Ayob, J. Rodriguez, A. Nadeem, and M. Abdelrahem, ‘‘Asymmetrical 17-level inverter topology with reduced total standing voltage and device count,’’ IEEE Access, vol. 9, pp. 69710–69723, 2021. [9] M. A. Hosseinzadeh, M. Sarebanzadeh, C. F. Garcia, E. Babaei, J. Rodriguez, and R. Kennel, ‘‘Reduced multisource switched-capacitor multilevel inverter topologies,’’ IEEE Trans. Power Electron., vol. 37, no. 12, pp. 14647–14666, Dec. 2022. [10] S. Pourfarrokh, J. Adabi, and F. Zare, ‘‘A novel multilevel inverter with self-balancing capability of capacitors voltage; structure, modulation, and operation,’’ IEEE J. Emerg. Sel. Topics Power Electron., vol. 11, no. 2, pp. 1854–1864, Apr. 2023.  

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Publication Date

10/29/2026

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Double-Blind Peer Review

Review Rounds: 2

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